Large digital systems are essentially composed of memory elements called "latches" or "flip-flops", combinational logic, and a clocking system. The memory elements are arranged in sets sometimes called registers. The number of elements in a set is usually the number of bits per word in the system. Between the sets of memory elements are combinational logic circuits. Each of these circuits performs logic operations on the outputs of a register and outputs the results of the operations to the inputs of another register.
At the end of a clock cycle, which is also the beginning of the next clock cycle, the data on the outputs of one combinational logic circuit is stored in a register. The data appears on the outputs of the register and, therefore, on the inputs of the next combinational logic circuit. This second combinational logic circuit performs the desired logic functions and applies the resultant data to the inputs of the next register. At the end of the next clock cycle, the data is stored in this second register. This process in repeated as the system operates, that is, data is processed by combinational logic circuits, stored, passed on to the next combinational logic circuit, processed, stored, and so on.
One common type of flip-flop is the master-slave flip-flop. The master-slave flip-flop is composed of two latch stages, namely, a master latch stage and a slave latch stage. The flip-flop inputs are coupled to the master latch inputs, and the master latch outputs are coupled to the slave latch inputs. The slave latch outputs are the outputs of the master-slave flip-flop. The coupling in the flip-flop is controlled by a clock signal. When the clock signal is active, the flip-flop input is connected to the master latch input and, therefore, the output of the master latch follows the input to the flip-flop. At the same time, the clock signal isolates the master latch output from the slave latch input. As a result, the flip-flop output is prevented from following every transition on the flip-flop input. When the clock signal changes to its inactive state, the master latch input is disconnected and its output is connected to the slave latch to become the master-slave flip-flop output.
A feature commonly used in digital systems is the "scannable latch" or "scannable flip-flop". A scannable flip-flop includes a latch which can be converted to a stage of a shift register by the use of appropriate clock signals. Whereas a register coupled between combinational logic circuits typically receives and outputs bits of a word in parallel, the shift register receives the bits at one end and shifts them through its stages serially to an opposite end. The scannable flip-flop allows the contents of the shift register to be "scanned" by shifting out the contents for examination. Following this "scan out" operation, the data formerly stored in the flip-flop can be restored to the flip-flop by shifting the data back in. Also, the flip-flop can be loaded with new contents by shifting in new data. Such operations are typically performed during testing and diagnostic procedures.
The ability to shift data in and out of registers is a powerful diagnostic tool. For example, if an error is detected during some complicated series of operations, the system can be stopped, and the contents of the registers involved can be shifted out. If further testing is required to isolate the cause of the error, a set of known data can be shifted into the registers. The system can then be allowed to carry out the series of operations one step at a time. After each step, the contents of the registers can be shifted out and compared to expected data. If there is no error, the data is shifted back into the registers, and the next step is executed. This process is continued until an error is detected. In this way, the register in which the error occurred is readily isolated so that the cause of the error can more easily be determined.